error correcting memory meaning

• [Computer]
  <storage> (ECM) RAM using some kind of error detection and correction (EDAC) scheme. The two types of memory errors in RAM (especially DRAM) are "soft" errors due to radiation-induced bit switching, and "hard" errors due to the unexpected deterioration of a memory chip. Soft errors do not indicate lasting damage to the memory board, but they do corrupt programs or data. Hard errors demand physical repairs. Single bit memory failures are the most common. A hard single bit failure, such as that caused by a completely dead chip can be corrected by EDAC if each chip supplies only one bit of each word. EDAC memory is the most common level of protection for minicomputers and mainframes whereas the cheaper parity protection is more common in microcomputers.

• With many chipsets, Memtest86 allows counting of failures even in error-correcting DRAM ( without special handling, error correcting memory circuits can mask problems with the underlying memory chips ).
• Another vulnerable processor component is the RAM . To ensure resilience to SEUs, often an error correcting memory is used, together with circuitry to periodically read ( leading to correction ) or scrub ( if reading does not lead to correction ) the memory of errors, before the errors overwhelm the error-correcting circuitry.
• Although both the consumer desktop and the workstation benefit from CPUs designed around the multicore concept ( essentially, multiple processors on a die, the application of which IBM's POWER4 was a pioneer ), modern workstations typically use multiple multicore CPUs, error correcting memory and much larger on-die caches than those found on " consumer-level " CPUs.

• "error correcting memory" meaning in Japanese: